Course Focus
The course focuses on enhancing the skills in designing VLSI systems to match the ever increasing demand of this cutting-edge technology. It also provides intensive training in VHDL / VERILOG and contemporary EDA tools for FPGAs and ASICs.
Course Structure
Batches are conducted in September every year
24 weeks (945 hours), Lectures 2 hrs/day, Practical 5 hrs/day.
Course Fee
Rs. 50,000.00 (To be paid in one installment by Demand Draft drawn in favour of “ICIT Pvt. Ltd., Pune”, within 10 days from selection for admission).
Eligibility
BE / B. Tech. (Electronics, Electronics & Telecommunication, Instrumentation, Electrical), M.Sc. (Electronics & Instrumentation), or equivalent. Final year students may apply.
Course Syllabus
| Topic | No. of hours |
|---|
Digital Design & Processor Design- Binary arithmetic, Boolean algebra, Logic Gates
- Combinational circuits, sequential circuits
- Advanced digital design, processor design
- Data path & control unit design
- State machine Design
| 120 hrs |
CMOS VLSI Design and layout- CMOS Process and Device technology
- VLSI Design Principles Hierarchy
- Stick diagram & Layout Design
- Testing and Verification
- PSPICE
- Logic Simulation
- Scaling of MOS circuits
- Study of CMOS circuits and their electrical, voltage & timing characteristics
| 175 hrs |
HDL Language- Detailed Study of verilog - Language Constructs
- Coding for Simulation and Synthesis
- Coding Guidelines, Design Interception levels
- Behavioral, Register Transfer, Gate, Device and Process level
- Advanced Verilog, Creating and interfacing PLI applications
- Introduction to VHDL
| 255 hrs |
Verification- Concept of verification
- Study of HVL - system Verilog
- Study of different test bench architectures
- Script driven test benches
- System level testing concepts
- Reuse of test bench components
- Coverage driven verification
| 95 hrs |
Implementation | 30 hrs |
PLD Architecture- Fundamentals of Programmable Logic PLD's (PLA, PAL)
- Architecture of popular CPLD and FPGA families like Xilinx '9500' series, xc4000 & Spartan 3E
| 90 hrs |
Study of Bus Architecture- Ethernet, MAC Protocol
- PCI Bus architecture
- FIREWIRE AMBA bus
- AXI Protocol, AHB protocol
| 20 hrs |
Telecommunication- Wireless communication
- Study of Communication protocols
| 20 hrs |
Soft Skills- Communication
- Technical writing
| 20 hrs |
Project Work | 120 hrs |
| Total | 945 hrs |
|---|