Preparatory Course for VLSI Design

Course Focus

This course focuses on imparting basic and fundamental skills and helps in understanding basic digital design, CMOS Design, CPLD Architecture and Bus Architecture. This course prepares the students for taking admission to Certificate Course in VLSI Design of Pune University.

Course Structure

6 weeks (150 hours), Lectures 2 hrs/day, Practical 2 hrs/day.

Course Fee

Rs. 5,000.00 (the course fee will be reimbursed if the student takes admission to Pune University Certificate Course in VLSI Design)

Eligibility

BE / B. Tech. (Electronics, Electronics & Telecommunication, Instrumentation, Electrical), M.Sc. (Electronics & Instrumentation), or equivalent. Final year students may apply.

Course Syllabus

Topic	No. of hours
Basic Digital Design Binary arithmetic Boolean algebra Logic Gates Combinational circuits Sequential circuits	20 hrs
Basic CMOS VLSI Design Hierarchy CMOS Process and Device technology VLSI Design Principles Hierarchy	80 hrs
CPLD Architecture Fundamentals of Programmable Logic PLD's (PLA, PAL) Architecture study of popular CPLD and FPGA families	20 hrs
Study of Bus Architecture Ethernet, MAC Protocol PCI Bus architecture FIREWIRE AMBA bus AXI Protocol, AHB protocol	20 hrs
General Aptitude Practice	10 hrs
Total	150 hrs